caching scheme中文什么意思

例句与用法

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1. the efficiency of the controller can be 36.36 % or 72.73 % when data length is 1 or 2 . when the data length is 4 or above, the efficiency can be 100 % . the effect that on-chip cache has on memory bandwidth is analyzed, and an on-chip cache scheme that can reduce 50 % reference data read
   通过多体交错式存取,本文设计的ddrsdram控制器在存取数据长度为1或2个字时,带宽利用率分别为36.36%和72.73%,存取数据长度为4个字时,带宽利用率可达到100%,满足了高清实时解码的要求。