sampling clock中文是什么意思

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中文翻译
造句

取样钟

sampling n. 1.取样(品)，取标(本)〔指行动或程序〕。 2. ...
clock n. 袜子跟部[侧面下方]的织绣花纹。 vt. 织[绣] ...
sampling clock noise 采样时钟带来的噪声; 采样时钟噪声
a clock 一个闹钟
clock n. 1.钟；挂钟，座钟，上下班计时计。 2.〔俚语〕记秒表，卡马表；〔美俚〕〔pl.〕驾驶仪表，速度表，里程计。 3.〔英俚〕(人的)面孔。 4.〔the C-〕【天文学】时钟座〔星座名〕。 5.【自动化】(电子计算机的)时钟脉冲(器)。 a Dutch clock(报时发杜鹃鸣声的)杜鹃钟 (＝cuckoo-clock)。 an eight-day clock八日上一次发条的钟。 a musical clock八音钟。 the face of a clock钟的字码盘。 What of the clock 〔古谑〕＝ What o'clock is it 现在是几点钟？ wind up the clock上(钟的)发条。 around the clock ＝ round the clock. clock calm 海面平静如镜。 fight the clock 抢时间。 like a clock 钟表似地，准确地，按部就班地。 put [set, turn] back the clock 把钟拨慢，倒拨；〔比喻〕阻碍进步；复古；开倒车；隐瞒年龄；扭转历史车轮。 race the clock 争分夺秒。 regulate [set] a clock by …根据…对钟。 round the clock ＝the clock round 昼夜不停，连续一整天。 set ahead a clock 把钟拨快。 when one's clock strikes 临终。 work against the clock 抢时间做完。 vt. 1.为(比赛等)计时；(运动员等)用…时间跑[游]完。 2.(用机械)记录(速度、距离、次数等)。 clock a swimmer (用跑表)记录游泳选手的成绩。 clock five minutes for the whole distance 用5分钟跑[游]完全程。 vi. (在自动计时器上)记下考勤。 clock in [out] ＝clock on [off] (用钟铃装置自动)鸣报开始[终止]时间；(职工用自动记录时钟)记录上班[下班]时间。 clock in (an hour) at (the work) 花(一小时)在(工作上)。 n. -er (比赛等的)计时员；交通量计算员。 n. 袜子跟部[侧面下方]的织绣花纹。 vt. 织[绣]上袜跟部[侧下方]花纹。
clock in 打卡上班; 记录上班时间; 时钟脉冲输入; 时钟输入
clock on 打卡上班; 记录上班时间
clock-on 锁定
the clock 闹钟; 时钟
sampling n. 1.取样(品)，取标(本)〔指行动或程序〕。 2.样品，标本。 3. 剽窃拼凑歌曲。
clock cycle clock rate 时钟周期时钟频率
clock offset，clock correction 钟差
pendule (clock); pendulum clock 摆钟
secondary clock; slave clock 子钟
simulated clock simulation clock 模拟时钟
striking clock; chime clock 自鸣钟
table clock; bracket clock 台钟
table clock; desk clock 座钟
a clock watcher 老是看钟表等下班的人; 舞会上无人邀请的女子
a desk clock 一具座钟
about clock 关于时钟
absolute clock 绝对时钟
after clock 时钟后
against the clock 分秒必争; 运动员单独比赛单独计时的比赛方法
airborne clock 空用时钟

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例句与用法

Of course the sampling clock is itself a digital signal
时钟本身也是数字信号，也会干扰模拟电路。
The sampling clock generator must also have adequate spectral purity
时钟发生电路固有的抖动应该足够小。
Figure 5 . 36 shows the relationship between sampling clock jitter and snr previously presented
图5 . 36显示了采样时钟抖动和信噪比之间的关系。
To achieve this the sampling clock should be isolated as much as possible from the noise present in the digital parts of the system
为此，时钟信号应该尽可能地与电路中强噪声的部分隔离开，例如数字电路。
The adc aperture jitter must be minimal , and the sampling clock generated from a low phase - noise quartz crystal oscillator
Adc的孔径抖动必需尽可能的小，而且要使用低相位噪声的石英晶体振荡器作为采样时钟发生器。
The ep2s15 of altera company , work as the system ’ s peripheral controller include fifo ( first in first out ) memory and sampling clock controller
Altera公司的ep2s15作为系统的外围控制器,实现对系统的fifo (先进先出存储器)与采样时钟的控制。
In this paper design of some circuit including in a / d circuit is also analyzed , such as front analog circuit , sample clock circuit and data flip - latch circuit
同时对高速转换器件及转换电路中包括前端模拟电路、采样时钟、后端数据锁存等辅助电路设计进行了分析。
As to phased array receiving , a scheme of separating the delay clock and sampling clock is explicated , which effectively enhance the phased receiving delay resolution
对于相控接收延时，本文阐述了一种将延时时钟和采样时钟分离的方案，有效地提高了接收延时分辨率。
Those include power supply circuit design ; ground plane design and sample clock design . combining some radar development , its high - speed a / d circuit is tested , and has given out some test results
最后结合某雷达研制，对其高速模数转换电路设计进行了实际测试评估，并给出了部分测试结果。
Such as harmonic distorted in front analog circuit , sample clock shaking , analog power and the noise in ground plane etc . some suggestion of circuit design is given to improve high - speed a / d circuit performance
在高速模数转换电路的应用设计中地电源供电设计、模数地平面设计、采样时钟设计等方面提出一些具有指导性的意见。