delay model中文是什么意思

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中文翻译
造句

延迟模型
延滞模式

delay vt. 延迟，拖延，耽搁。 We'll delay th ...
model n. 1.模型，雏型；原型；设计图；模范；(画家、雕刻家 ...
distributed delay model 分布时延模型
pure delay river model 纯延时河流模型
time delay model 延时模型
delay vt. 延迟，拖延，耽搁。 We'll delay the party for two week. 我们要把会期延迟两周。 The train was delayed by heavy snow. 火车因大雪误点了。 vi. 耽搁，耽误，迟误。 It's getting late; don't delay. 时间已晚，别再耽误了。 n. 延迟，拖延，耽搁，耽误。 No more delays, comrades. 同志们，再迟不行了。 admit of on delay 不能耽搁。 without delay 赶快，立刻，马上。 n. -er 延迟器；缓燃剂。
on delay 通电延迟; 正延迟
as model 作为模式的同性恋
model n. 1.模型，雏型；原型；设计图；模范；(画家、雕刻家的)模特儿；样板。 2.典型，模范。 3.(女服装店雇用的)时装模特儿。 4.样式，型。 5.〔口语〕极相似的人[东西]。 adj. 模型的，模范的。 a clay model 【雕刻】黏土原型。 a working model 机器的运转模型。 a model shot 【摄影】模型镜头。 a model aeroplane 模型飞机。 a model test 典型试验。 The boy is the perfect model of his father. 这孩子活像他父亲。 after [on] the model of 仿效…，拿…当做模范。 stand model 做模特儿。(〔英国〕 -ll-) vt. 1.作…的模型[雏型]。 2.(依照模型)制作，仿造，建造 (after；on；upon)。 3.设计，仿照，拿…做模范。 vi. 做模型；做模特儿。 delicately modeled features 清秀的面貌。 model a garden after the manner of Kew 仿照(伦敦) Kew 植物园设计的花园。 model oneself up (on) sb.仿效某人。
model no 型号
model on 仿造, 模仿
or model 运筹学模型
s model 斯雷特模式
delay rate rate of delay 延滞率
model of model 环球超级模特
a delay in shipment 迟装
a wering delay 应答延迟
absolute delay 绝对迟延绝对延迟; 绝对延时
absorption delay 吸收延迟
access delay 存取延迟; 接入延迟; 介质访问延迟
acoustic delay 声延迟
acquisition delay 搜索时滞
adjustable delay 可调延迟时刻
adjusted delay 蝶延迟
administrative delay 管理延迟(对于修复性维修)

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例句与用法

In chapter 5 , the methodologies of calibrating the road weight measured by travel time based on road impedance function model and signalized intersection delay model are proposed , and are realized and verified using a large amount of field data
论文第五章提出了基于路阻函数模型和信号交叉口延误模型，标定以出行时间度量的道路权重的方法体系，并利用实测数据加以实现和检验。
Through the simulation and calculation of the delay models , the improvement degree of the new material and geometric parameters for the interconnect delay can be concluded and performance optimizations should be made by analyzing these influences
而通过互连延时模型的模拟与计算，得出新材料即铜和低k介质对延时的改善程度，及互连线的几何参数对互连延时的影响，并根据这些确定最优尺寸来适应集成电路设计的需要。
The tapped delay model of the multi - path frequency selective fading channels as well as the diversity receiver technique is introduced , and the principles of rake receiver are described . then various downlink channel estimation techniques , such as simple averaging , wmsa and fbprelms are analysed in detail
本文首先讨论了移动通信信道的各种参数对信道估计的影响,介绍了频率选择性信道的抽头延迟线模型和分集接收技术,在此基础上阐述了rake接收机的原理。
Based on the queuing theory is , new delay model is brought forward . then the model is modified and parameters are estimated by simulated data . after talking about the effect factors , the model is compared with existing famous models
根据车辆的到达过程和服务过程特性，在理论分析基础上，得到了理论排队模型和延误模型，并根据模拟数据对模型进行了修正和参数标定；对延误的部分影响因素作了分析的同时还考虑了与其他模型的比较，同时还简单地讨论了左转延误。
An algorithm of path - based timing optimization by buffer insertion is presented . the algorithm adopts a high order model to estimate interconnect delay and a nonlinear delay model based on look - up table for gate delay estimation . and heuristic method of buffer insertion is presented to reduce delay . the algorithm is tested by industral circuit case . experimental results show that the algorithm can optimize the timing of circuit efficiently and the timing constraint is satisfied
提出了一种基于路径的缓冲器插入时延优化算法,算法采用高阶模型估计连线时延,用基于查表的非线性时延模型估计门延迟.在基于路径的时延分析基础上,提出了缓冲器插入的时延优化启发式算法.工业测试实例实验表明,该算法能够有效地优化电路时延,满足时延约束
Abstract : an algorithm of minimizing the number of buffers under certain delay constraint with accurate delay models is presented . given a two - terminal net , the algorithm can minimize the total number of buffers inserted to meet the delay constraint . a high order delay model is applied to estimate interconnect delay and a nonlinear delay model based on look - up table is for buffer delay estimation . the experimental results show that the algorithm can efficiently achieve the trade - offs between number of buffers and delay , and avoid needless power and area cost . the running time is satisfactory
文摘:提出了在精确时延模型下,满足时延约束的缓冲器数目最小化的算法.给出一个两端线网,该算法可以求出满足时延约束的最小缓冲器数目.运用高阶时延模型计算互连线的时延,运用基于查找表的非线性时延模型计算缓冲器的时延.实验结果证明此算法有效地优化了缓冲器插入数目和线网的时延,在二者之间取得了较好的折中.算法的运行时间也是令人满意的
C ) setting the functional models of urtss . it includes urban road traffic net structure model , traffic generation model , vehicle behavior model ( vehicle followed moving model , tightly followed moving behavior , regular exceed and changing line process , delaying model result from forced occupying and changing line ) , urban road traffic net analyse model
建立了城市道路交通仿真系统的功能模型：城市道路交通网络结构模型、交通生成模型、车辆行驶行为模型(车辆跟驰原理、紧密跟驰行驶行为、常规超车换道过程、强行挤车换道行驶以及由此引起的延误模型) 。
Then studis on new models and new approaches based on boolean process in delay automation are made . analytical delay model is improved with the new concept of sensitization , based on which delay matrix is proposed to describe the delay of circuit modules . then introducing hierarchical delay analysis methods into delay matrix analysis , a novel exact hierarchical delay ananlysis method is presented
在组合逻辑电路精确定时方面，本文用波形多项式偏导定义的敏化概念改进了解析延时模型，在此基础上建立了基于敏化的延时矩阵以描述电路模块的延时，随后将层次化延时分析方法引入基于延时矩阵的延时分析中，形成一种新的精确的通用电路层次化延时分析方法。
Abstract : a new clock - driven eco placement algorithm is presented for standard - cell layout design based on the table - lookup delay model . it considers useful clock skew information in the placement stage . it also modifies the positions of cells locally to make better preparation for the clock routing . experimental results show that with little influence to other circuit performance , the algorithm can improve permissible skew range distribution evidently
文摘:提出了一种新的时钟性能驱动的增量式布局算法,它针对目前工业界较为流行的标准单元布局,应用查找表模型来计算延迟.由于在布局阶段较早地考虑到时钟信息,可以通过调整单元位置,更有利于后续的有用偏差时钟布线和偏差优化问题.来自于工业界的测试用例结果表明,该算法可以有效地改善合理偏差范围的分布,而对电路的其它性能影响很小