data path中文是什么意思

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中文翻译
造句

数据通道
数据通路

data n. 1.资料，材料〔此词系 datum 的复数。但 d ...
path n. (pl. paths ) 1.(自然踏成的)路；路 ...
path, data 数据通路
access path of data structure 数据结构存取路径
automatic data path synthesis 自动数据通路综合
buffer data path 缓冲数据通路
controller, data path (dpc) 数据通路控制器
data access path 数据存取路径; 数据存取通路
data of wire path compensation 电极丝补偿量
data path controller 数据通路控制器
data path controller (dpc) 数据通路控制器
data path delay 数据通路延迟
data path register 数据通路寄存器
data path resumed 数据通路恢复
data path suspended 数据通路挂起
data path switch 数据通路开关
data set path 数据集路径
data transmission path 数据传输通路
data-path controller (dpc) 数据通道控制器
data-path function 数据通路功能
dddistributive data path 分配词数据路径
direct data path 直接数据通路
dps data path switch 数据通路开关
eight bit data path 八位数据通路
logical data path 逻辑数据通路

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例句与用法

And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths . boundary scan is designed according to ieee1149 . 1 , and some other instructions such as degug , runbist are provided to support internal fault testing , online debugging and built - in self - test besides the several necessary insructions . internal scan is implemented by partial scan , through this the boundary of logic component and user - cared system registers can be selected to be scanned
Bist用于测试cpu的微码rom ,其它ram则利用微码rom中的微程序进行测试,而微程序的运行则可以顺带覆盖其它数据通路,从而使高达70 %的硬件得到测试;边界扫描按ieee1149 . 1标准设计,除必备的几条边界扫描指令外,还提供了debug 、 runbist等指令以支持内部故障测试、在线调试及内建自测试;内部扫描采用部分扫描策略,选择逻辑部件的边界及用户关心的系统寄存器进行扫描,从而实现了硬件逻辑划分,方便了后续的测试码产生和故障模拟,并为在线调试打下了基础。
After analyzing and comparing different partition rules , md32 pipeline architecture is finally defined , which meets the required instruction function , frequency and timing spec of md32 . a complete set of creative design method for risc / dsp md32 micro - architecture is presented , such as parallel design , internal pipeline , central control , etc . thanks to the adoption of these design methodology , control path and data path are separated , circuit delay is reduced , and complex instruction operations are balanced among multiple pipeline stages
它们将若干复杂指令操作均匀分配在几个流水节拍内完成，实现了任意窗口寻址等复杂指令操作，将整个处理器的数据通路与控制通路分离，减小了电路时延，从而满足了risc dsp不同指令功能和系统时钟频率的要求，构成了统一的、紧密联系的、协调的md32系统结构。
( 2 ) research the instruction launch strategy , controls correlation processing and data correlation processing of 32 - bit mips ’ s double - launching pipeline . obtained the design modes : static launch , optimized compile instruction , 1st pipeline jump and branch processing and double pipeline four channels front data path . ( 3 ) achievement designs by the platform xilinx ise 5 . 2i , uses the verilog hardware description language to carry on the design description to the double - launching
( 2 )对基于32位mips架构双发射流水线的指令发射策略、控制相关处理和数据相关处理等流水线结构的重要问题进行深入研究,并得出了静态发射、优化编译指令序、第一流水线无延迟分支处理和双流水线四通道前向数据通路等一系列能够与32位mips架构相匹配的双发射流
In this paper , low power flip - flops designs by the reduction of the load of clock or the data path ; by the reduction of clock swing ; by the reduction of clock frequency and by the reduction of those idle transitions in cmos circuits with clock gating are discussed
与此相对应的，在本论文中，分别对将少时钟负载或数据通路的负载的触发器设计；减小时钟信号幅度的触发器设计；降低时钟频率的双边沿触发器设计以及应用门控技术来减少触发器无效跳变设计的触发器结构进行了讨论。
The cluster file systems for large - scale clusters should have multiple data paths and multiple metadata paths in architecture . metadata transactions are decoupled from file read and write operations . large - scale network storages are used to provide multiple file data paths
面向大规模机群的机群文件系统的体系结构应该是多数据通路多元数据通路的,即元数据处理与文件i / o分离,利用大规模网络存储系统来提供多条数据i / o通路,利用一组元数据服务器来提供多条元数据i / o通路。
This paper analyze the architecture of amex86 microprocessor , including the analyzer of instruction system , addressing mode , scheduling and clock of instruction , the integration and validation of amex86 architecture . this paper mainly discusses the design and realization of data path and instruction decoder in detail
本论文将对amex86体系结构的微处理器进行体系结构分析，包括指令系统的分析、寻址方式的分析，指令时序以及指令时钟拍数的分析和amex86系统的集成及验证等。
Following describing the system ' s organisation , we discuss the design and implementation of the system in detail including data paths , alu . to design the control paths , we start with the analysis of mcs51 instruction set , and then discuss the instruction execution procedure instruction and operation , and schedule of instruction timing
Risc51ipcore控制通路的重点是兼容mcs51单片机指令系统的设计与实现，本论文从mcs51指令系统的分析入手，详细讨论了指令的执行流程、内部指令和操作的设置、指令的时序安排的设计与实现。