The relevant program of both the dongle and the computer have also been developmented . a parallel port and a serial port are provided for the pcb . there is a program ( in vhdl , vhsic hardware description language ) carrying out in the pld which implementi ng the parallel protocol . an encrpt arithmetic is designed and embeded in pld . to providing a interface for the user , a dll ( dynamic link library ) is developmented in c + + builder 所设计的电路板上可以选择连接串行口或者并行口,在pld内用vhdl ( vhsichardwaredescriptionlanguage ,硬件描述语言)实现了并口的通信协议和一个自行研制的密码算法,并在c + + builder环境下开发了配套的上位机软件,主要是提供了dll (动态链接库)和一些函数用于pc机和加密锁之间进行通信。
Now , we are designing high - end microcomputer by means of international advanced ic design technology and manufacturing techniques . electronic design automation is useful tool in vlsi integrated circuit field . eda tools can design complex electronic system by hardware description language ( hdl ) , simulate function , synthesize , place & route and verify sequence for the whole system 凭着对国际上先进的risc微处理器结构的吸收、掌握的技术积累,大胆采用国际上最先进的集成电路设计及制造技术,致力于设计出具有世界先进水平的risc微处理器,对我国的电脑工业有着特别的意义,可以从根本上改变我国电脑工业的处理器从国外进口的历史。
The hardware circuit boards are produced by a laser photoplotter according to the gerber files gererated from the schematic ( sch ) documents and the printed circuit board ( pcb ) documents . the cplds , programmed with the verilog hardware description language ( verilog hdl ) , were completed after four steps : design , simulation , synthesis and fit . the software is developed with c language using direct i / o to communicate with the device through the isa bus computer interface 其硬件电路由专业软件设计出原理图sch和印刷电路图pcb生成,再gerber文件,然后光绘而成, cpld芯片编程(采用硬件描述语言veriloghdl )经过设计、模拟、装配、下载完成,高级软件编程采用c语言i / o方式利用isa总线接口与外设进行通信。
First , the basic raster graphics algorithms for drawing 2d primitives are introduced , including edge coherence and the scan - line algorithm of triangle , brush algorithm of thick line ( and its improved method ) and midpoint circle and ellipse algorithm ; and the current situation of the advanced algorithms is also involved . second , the mapping of high level programming language to hardware description language is described , some principles of the conversion of algorithm to state machine are proposed also ; then , the implementation of basic graphics in hardware is discussed in detail , the state machines are drawn in the paper , and the interfaces of hardware are defined , block diagrams too , and the advanced algorithm of conic is proved ; finally , some issues about test are described , the results of simulation and synthesis are given in the last , and some detailed data are displayed in the appendix 首先介绍了现有的基本图形生成算法,包括三角形边相关扫描算法,宽直线的线刷子算法及其改进和圆形、椭圆的生成算法,同时介绍了加速算法的研究现状;然后,讨论了高级语言描述到硬件描述语言的映射,提出了算法到状态机抽象的规律;接着具体讨论了基本图形的硬件实现,给出了各算法的状态机图,接口定义和实现框架,并且从理论角度给出了二次曲线加速算法的证明:最后采用软件工具进行测试验证,给出了模拟、综合实现的结果,并在附录中有详细的实验结果数据。
And the controller based on vhdl ( very high speed integration circuit hardware description language ) was designed under the fpga ( field programmable gates array ) integration environment with the values gained from the train of the neural network using matlab 气动柔性手指神经网络控制器是在已经对气动柔性手指进行运动学和动力学分析的前提下,使用matlab对神经网络进行试训,依据训练所得的权值和阈值,在现场可编程门阵列集成环境下,基于超高速集成电路硬件描述语言完成的。
Based on phase - locked multi - frequency division method , and then a method of using lsi - isp devices to design to realize integrating designation . this paper briefly introduced isp devices and hardware description language vhdl , and designs a kind of high integrated grating digital readout based on division theory and isp design theory 文中将在系统可编程器件和相应的硬件描述语言vhdl作了简要介绍,本文还详细介绍了基于锁相细分理论和isp设计思想的高集成度的光栅检测装置。
The methods of adopting fpga to realize the function of counter , and adopting verilog hdl hardware description language to design every function modules , not only makes the whole design more compact and stable , but also make the alteration of the circuit ’ function merely need to alter the software according to the practical task requires , and needn ’ t alter the hardware connection of the circuit 在计数器功能的实现上采用fpga ( fieldprogrammablegatearray ) ,利用veriloghdl ( hardwaredescriptionlanguage )语言编写了各个功能模块,不仅使整个设计更加紧凑、稳定且可靠,而且可以根据实际的任务要求,在无需改变硬件电路板的情况下,通过修改硬件描述语言程序,即可修改电路功能。
In this method , the mems design flow from the system level to device and process level was established and proved by the design of micro gyroscope . in the system level , the system modeling characterized by multi - discipline was simplified and solved by lumped - parameter modeling and nodal analysis method . the mems component library was constructed through analog hardware description language 首先,针对mems系统级设计的多学科交叉的特点,提出了以集中参数建模方法解决mems系统的功能建模,以节点分析法解决不同功能元件的结构实现,以混合信号硬件描述语言作为系统建模和仿真的基础,并以此建立mems元件库。
With the help of newly developed advance electronics design automation ( eda ) technology , some roles and tens or hundreds of components of traditional instruments could be replaced or redesigned by means of large scale programmable logic chip ( cpld / fpga ) with the characters of the high integration , designed with hdl ( hardware description language ) and supporting iap ( in application programming ) and isp ( in system programming ) 而随着eda技术的飞速发展,大规模可编程逻辑芯片cpld fpga应运而生。这类芯片可以替代几十甚至上百块通用ic芯片,而且,因其可用硬件描述语言进行芯片设计、支持在线编程和在系统编程等优点而备受青睐。