In mss , an attribute of a mass storage volume that allows more than one processing unit at a time to access the volume 在海量存储系统( mss )中,大容量存储卷的一种属性,允许一个以上的处理部件在同一时间存取该卷。
A system consisting of two or more processing units , alus , or processors that can communicate without manual intervention 由两个或多个处理部件、算术逻辑部件或不用人工干预就可以相互通信的处理机所组成的一种系统。
Amex86 microprocessor is composed of integer processing unit , float - point processor unit ( math coprocessor ) and protect test unit Amex86系统由一个整数处理部件( cpu ) 、一个浮点处理部件(数学协处理器)和一个保护测试单元组成。
Pertaining to processing units that are connected by means of channel - to - channel adapters that are used to pass control information between the processors 用于修饰或说明经由通道到通道适配器连接的处理部件,通过这些适配器在处理机之间传递控制信息。参阅tightly coupled 。
Traditionally , the components of the hlr system are connected by local ethernet network , and the transaction processing component need to get the user ' s information from database component by this local ethernet network 传统hlr系统的信令前置机部件、业务处理部件、数据库部件之间采用高速以太网互连,业务处理部件需要访问数据库部件才能完成业务处理。
Various of special components have been equipped in the master control computer of the theodolite , including communication controlling and handling component , timer - code generator , interrupt component and dual - port data exchanging card 光电经纬仪主控计算机系统中配备多种专用部件。这些部件包括通信控制处理部件、时统部件、中断部件、双端口数据交换卡等。
Higher - speed dsps extend possibilities to design more reliable , functional and compact radar signal processing systems . this thesis presents a high - speed dsp system based on tms320c6701 dsp to real - time implement azimuth compression 本论文结合电子所机载合成孔径雷达实时数字成像处理器工程项目,设计开发了采用tic67dsp作为核心处理部件进行方位处理的高速信号处理系统。
The dissertation aimed at designing a new signal processor basing on the development of hardware and the signal process of high frequency ground wave over - the - horizon radar . after that , basal signal software of dsp , a important part of processing card , is designed 本课题目的就是根据当今数字信号处理器件的发展和高频地波雷达的信号处理过程,提出信号处理机的系统设计方案,然后对其中信号处理板中的主要处理部件dsp进行基础软件的开发。
After that , this paper provides a block diagram of the prototype system , analyzes every sub - system and its internal structures and then defines the dsp as the key processors in the whole system , gives a comprehensive , detailed presentation about the hardware design 在此基础上,给出系统的硬件实现框图,逐步细化各个分系统及分系统内部结构的设计问题,确定以dsp为系统的核心处理部件,全面、具体的阐述了本系统涉及到的硬件电路设计问题。
Then the thesis presents two peephole optimizations for the c 、 c + + compiler based on the architecture of thump to improve the quality of generated codes . one optimization is on multimedia applications . since thump supports two mmx instructions , the optimized compiler can generate these instructions to improve the performance 论文讨论了如何利用thump体系结构的特点进一步提高目标代码生成质量的优化技术,并实现了两种窥孔优化,包括针对thump的多媒体指令的优化算法和基于thump的高速乘除处理部件的优化算法。