寄存器文件的英文

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英文翻译
造句

寄存器 register; tell-table; tempor ...
文件 document; file; papers; inst ...
多端口寄存器文件 multiport register file
寄存器文件存储 register file storing
寄存器文件装入 register file loading
可扩展寄存器文件 expandable register file
通用寄存器文件 general-purpose register file
文件寄存器 file register
工作区文件寄存器 workspace file register
文件标记门（寄存器） ftg file tag gate register
文件地址寄存器 file address register
文件间接寄存器 file indirect register
文件输入标志（寄存器） fti file tag in register
mid乐器文件 mid files
服务器文件 server document
记录器文件 recorder file
伺服器文件 server document; server explorer
文件奇偶校验寄存器 file parity check register
文件输出标志寄存器 fto file tag out register
文件微程序标志（寄存器） fmf file microprogram flags register
寄存器 [计算机] register; tell-table; temporary storage 变址寄存器 index register; 进位寄存器 carry storage register; 程序寄存器 programme register; 缓冲寄存器 buffer register
寄存器-寄存器操作 register-register operation; register-to-register operation
寄存器级, 寄存器水平 register level
新建发射器文件夹 new emitter folder
2位寄存器 shift register

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例句与用法

In system emulator , atmega monolithic processor compatible
内部外部ram内部寄存器文件
These results are then committed to a separate architectural register file during in - order retirement
这些结果然后在有序退回时，存放在一个独立的结构寄存器文件中。
This supports a 40 - entry physical register file that holds temporary write - back results that can complete out of order
此支持40种物理寄存器文件，此文件含有能混序完成的临时回写结果。
The results of simulation show that the average number of write operation on rf is reduced by 94 % for various application programs
软件仿真结果表明，对dsp中不同的应用程序平均可以减少94的寄存器文件写次数。
Then , the thesis , based on march c - algorithm , shadow read and shadow write technologies , put forwards bist arithmetic for the 20 - port register file
之后本文在marchc -算法的基础上,结合shadowread和shadowwrite技术,首次提出了针对20端口寄存器文件的bist算法。
2 , design and realization the data - path of armp processor . including arithmetic logical unit ( alu ) , register files . shifter , multiplier and so on
2 、对armp中数据通路的设计与实现：包括alu的设计、寄存器文件( registerfile )的设计、移位器( shifter )的设计、乘法器的设计等等。
In the second part , this paper does deeply research on how to use the memory system effectively . firstly , this paper proposes a modified register allocation via graph coloring to alleviate port conflicts
然后,面对分体寄存器文件可能产生端口冲突的新问题,提出了改进的基于图着色的寄存器分配法。
This thesis addresses itself to the designing and implementation of the multi - level memory system of dpc , including the register files , instruction cache , data cache and the on - chip memory , which is called scratch - pad sram
本文采用了多层次的存储体系结构,包括分体寄存器文件、分离的指令、数据cache以及片上存储器scratch - padsram 。
Not only fault model , but also test arithmetic demand to be farther improved . the thesis , focusing on the 20 - port register file , makes a fault analysis , particularly in complex bridge fault and crosstalk coupling fault aroused by word - line and bit - line of 20 - port
本文针对所设计的寄存器文件进行了故障分析,特别对20端口字线、位线引起的复杂桥接故障和串扰导致的耦合故障进行了详尽论述。
In the data path , many modules were designed and implemented , such as alu . data bus unit , w ( work register ) and registers file . the designs of peripheral functional modules were finished , including usart , spi and io
在详细分析riscmcu的体系结构特点的前提下，进行了系统划分，并详细设计了该riscmcu的数据通路，包括设计该数据通路上的alu单元、内部数据总线、工作寄存器w以及寄存器文件等功能模块。